XimplicXimplic

The Ximplic inference IP

One energy-efficient inference block. It does the math where the data already sits, so always-on devices run AI without draining the battery. Proven in software and on FPGA today, ready to license into your SoC.

A licensable inference block that computes in memory

Architecture
SRAM in-memory
Standard digital SRAM cells, no exotic process.
Integration
AMBA AXI
Drops into your SoC over a standard bus, like any IP block.
Models
Any AI model
Any trained ONNX network, mapped onto the array by our flow.
Status
FPGA-proven
Runs end to end on FPGA today; silicon on the roadmap.

One block, a de-risked path

Our proprietary flow takes you from a trained model to silicon-ready IP: evaluate it in software, map any model onto it, then license the same validated design.

01

Evaluate

Vyzora

Run any AI model on a virtual copy of the chip and measure power up front. Software only, no hardware.

Learn more
02

Map

Vextyl

The compiler maps any trained ONNX model onto the memory array, quantized and checked against the hardware.

Learn more
03

Integrate

Xengra

The synthesisable RTL drops into your SoC over a standard AMBA AXI bus.

Learn more
04

Silicon

Silven

A hardened, drop-in macro. On the roadmap.

On the roadmap

Two ways it integrates into the SoC

From a low-risk drop-in to an in-place memory upgrade. Option A is available and FPGA-tested today. Option B is on the way.

Option AAvailable · tested

External Accelerator

Host SoCunchangedAcceleratordrop-in blockAXI
  • — Sits next to the host SoC as separate IP
  • — Standard AXI bus connection
  • — Zero changes to host silicon
Evaluate via the Virtual Prototype
Lowest risk · fastest PoC
Option BIn progress

In-Place Memory Upgrade

HOST NODEcoresXIM SRAMcompute + memory
  • — Replaces passive on-chip SRAM
  • — Same footprint, memory now computes
  • — Zero data movement
Register interest
Highest performance · production target
License the IP

Start the evaluation, then the design-in

Share your target workloads and platform. We'll scope a software evaluation under NDA, then walk the same path you just read into your SoC: map your model, integrate over AXI.

Email info@ximplic.com · Groningen, The Netherlands